Since we all know SystemVerilog is a fairly complex & wide features set language. Hence I thought, it could be useful to have a List of Key SystemVerilog topics at one place which can serve the purpose to run through it quickly and to flash through the language’s key topics. Running through it, may act as a quick brush-up & it can also help to analyze which particular topic in the list needs little brush-up or required to have a deep look.
Hence, I tried to compile this list with the keywords which are primarily focused uponSystemVerilog for Functional Verification features:
- OOPs Concepts
- Polymorphism
- Inheritance
- Data Types
- Typedef
- Enumerations
- Dynamic Array
- Associative Array
- Packed & Unpacked Array
- Queues
- Package
- Interface
- Modports
- Clocking Block
- Program Block
- Class
- Objects & Handles
- Methods & Properties
- Virtual Class
- Abstract Class
- Parameterized Class
- Virtual Methods
- Virtual Interface
- Static Properties
- Static Methods
- This
- Super
- Local & Protected Variables
- Constructor
- Tasks & Functions
- Void Functions
- Automatic & Reference
- Deep & Shallow Copy
- Processes & Events
- Downcasting & Upcasting
- Randomization
- std::randomize
- rand & randc
- Functional Coverage
- Covergroups
- Coverpoints
- Bins
- Cross Coverage
- Assertions
- Constraints
- Type of Constraints
- In-line Constraints
- Direct Programming Interface (DPI)
- Mailbox
- Semaphore
- Callbacks
Following diagram below will additionally help to provide a picture of SystemVerilog Language evolution:
If you feel something is missing, pl. provide your comment. I’ll be happy to include that into this list.
Hope it helps…Good Day!
